DSP - Digital Signal Processing

What's a DSP?

It's a device for digital calculus with quantization noise. Digital and not analog calculation for a simpler design.

• CLOCK-RATE 10-100MHz, slower than General-Purpose Processors
• NUMERIC REPRESENTATION integers
• COST 10-20$
• TIME TO LIVE IN MARKET up to 20 years, they should be replaceable for long time.

DSPs are different from PCs by:

• MAC (Multiplier ACcumulator, dedicated device for + and * operations)
• Memory architecture (Harvard)
• Addressing
• Commands execution
• I/O

Flashing programs into DSP

FIRST CASE

There isn't an Operating System, programs can be flashed with a DSK boards (DSP starter kit)

Languages used are C (without malloc) or Assembly. DSK boards needs a PC to write and compile the program.

To make a DSP program we need to perform all these steps:

• Write the code with a PC
• Compile the code with the PC
• Transfer the program into the board
• Run the program on the board
• Read results with PC

But I can't work abitually with a DSP starter kit..

The problem: data speed from board to PC.

SECOND CASE

I can enhance this speed with a reduction of the distance between PC and board, using an EVM board with PCI slot.

EVM -> Evaluation Module

• Only for professional use
• About 2000$
• Limit: just the PC

THIRD CASE

Without PC: Stand-alone board

The third system of work is a stand-alone board, with DSP, RAM, EPROM and user interface all included.

Benefits is the independence from PC, but cost is high.

Cost are sum of:

• DSP cost (10-20$)
• Memory cost (low)
• Hardware design cost (because designers must guarantee the correct behavior)

FOURTH CASE

We can optimize the space, with the integration of connections. Links shorter increase the bandwith, and decrease power dissipation.

Hardware design cost is very high, only masks for photolitography costs about 1000000$.

FIFTH CASE

We can build all with a general-purpose chip, a CORE EMBEDDING mode. By using a FPGA, manufacturing costs are raised, and the major problem is out. Dimensions are not best, but design costs are better than one custom chip solution, and the power dissipation are about the same, because chip parts not used are disconnected at runtime.

Today FPGA's efficiency is about full-custom efficiency.

Summary

DSK -> EVM -> Standalone board -> Full-custom chip -> Core embedding

Numeric representation

Possible representation are INT (integers) or FLOAT (floating point). INT numbers are generally represented by 16 bit (for video applications can be 24), FLOAT numbers require 32-bit, 8 for the exponent and 23 for the base.

Int numbers available with 32 bits are from 0 to (2³²)-1

Float numbers are from 1.2*10^-38 to 3.4*10³⁸ but, in all the representations we can have a maximum of 2³² numbers.

You must choose the DSP who uses the numeric representation more useful for your application. In fact, int representation give you numbers with a percision of +/- 1. It's useful for large numbers, but for little umbers, like 1000 or 100, you have a magnitude with an error of 10^-3 or 10^-2, too few for most application! Float representation presents the same error in the entire range of numbers,

Memory architecture

Classic architecture is Von-Neumann Architecture: the CPU can exchange data with the memory across one data-bus.

The DSP implements the Harvard Architecture, with two data-bus and two memories for high performance and contemporay instruction and data fetch.