The SPI bus

Basics about the Serial Peripheral Interface standard bus

The SPI bus is one of most commons buses used for interfacing microcontrollers and other devices in a large number of embedded systems. Common standards like this are CAN, I2C etc.

Serial buses are always preferred to paralle buses, due to simpler connections and minor presence of line disturbs. Today serial buses are very competitive, and device SPI based can work at high clock rates, upon to several MHz.

The SPI interface, name given by Motorola, is used to enable a serial and synchronous communication across a main processor and a number of peripherals. It is also possible a SPI connection between two processors. The SPI interface can support two configurations, named Master and Slave. The Slave mode is the peripheral standard configuration. In this case, we have 2 control lines and two data lines. In a cascade configuration, the SDO output become the SDI input of the following device.

Figure 1 – Device configured as Slave

 

The device configured as 'Master' provides a clock signal and some signals to select slave devices (SCKL and CS#). In this way, we can easily note that a SPI configuration needs one Master and a number of Slaves less than or equal to the number of CHIP SELECT signals provided by the Master.

A slave device can be compared to a shift register; the input is in serial mode, and the data is processed in parallel way into the device. The lenght of the shift register is not fixed, often is 8 bit wide or its multiples. There is also registers with a odd number of bit.

When a Slave device is inactive (CS signal not active) the SDO output is switched in an high impedance status. In this way, it will not cause pboblems or conflicts with the output of another device active. This is the classic approach to the bus communications.

Slaves can be connected in "cascade" configuration, and the master device interacts with them as an unique device (and is used one CS signal).

 

Figure 2 – Slaves in cascade mode

 

Another connection configuration is to make the slaves indipendent; the master provides a CS signal to each slave, and is used an unique line to receive the slaves outputs; to make this configuration working is necessary the high impedance state of the outputs.

 

Figure 3 – Master connected with indipendent slaves

 

Last revision: March 21, 2008